Holistic Patterning Solutions in Leading Edge Semiconductor Device Manufacturing
Variations in the many process steps involved in today’s leading edge semiconductor device patterning process can significantly impact the projected yield ramp. Device makers now require innovative metrology and control solutions to mitigate the impact of variations in high volume manufacturing.
Using an holistic approach to patterning optimization and focusing metrology on device performance are critical when enabling the industry to transition to the next node. This presentation describes these enabling technologies in detail.