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MI Forum

 

MI Strategies for 1+3

  • Date: Thursday, February 9, 2017
  • Time: 10:00-17:10
  • Room: #300, Conference Room (South), COEX
  • Language: English and Korean (Simultaneous interpretation will NOT be provided)

 

Registration Fee  
  SEMI Member Non-Member Student
Pre-regi(by Feb 1) 120,000 won 150,000 won 60,000 won
Onsite 150,000 won 180,000 won 80,000 won

 

We are heading to 1-digit Design Rule for semiconductor industry and it is expected that there are a lot of difficulties we are going to meet in near future. And there has been another approach for developing semiconductor device, which is 3D types of device. In fact, in MI forum, both topics were touched already. However, these hot topics should be revisited for better understanding and MI preparation for both. We believe these two topics are worthy of attention again in 2017 at MI forum. This year, MI forum’s catchphrase is “MI strategies for 1+3” and in here 1 means 1 digit (below 10nm) and 3 does 3D structure. This forum is remarkable one which is only one in all SEMICON shows with 9-years history. We hope you can find needs and solutions of MI for 1+3 with excellent speakers who are invited from the worldwide.

Byoung-Ho Lee, Ph. D. (Research Fellow, SK hynix)

Sponsored by

 

Committee

Chang Woo Kim (KLA-Tencor Korea)
Harris Kim (Rudolph Technologies Korea)
SuYong Park (Semilab Korea)
Youngjoon Park (Nanometrics Korea) 
Chris Park (Nextin)
Byoung-Ho Lee (SK hynix)
Suk Woo Martin Lee (Applied Materials Korea)    
Hyung-Yup Lee (Thermo-Fisher MSD Korea)

 

Agenda

Session 1: Sub 10nm  
   
10:00-10:40
Defect Inspection for Advanced Process Nodes
  Kale Beckwitt, Intel (invited)
   
10:40-11:10 Using New Optical Metrology for Inline Electrical Characterization of Advanced Logic Devices
  Andrei V. Shchegrov, KLA-Tencor
   
11:10-11:40 Exploring Multi-patterning Metrology Challenges
  Shimon Levi, Applied Materials
   
11:40-12:10 Recent Advances in Electrical and Optical Characterization Techniques for Advanced Process Control
  Nicolas Laurent, SEMILAB
   
12:10-13:30 Lunch (Lunch Box will be served)
  Sponsored by Applied Materials
   
Session 2: 3D  
   
13:30-14:10 Characterization and Metrology from FinFETS & Interconnect to Beyond CMOS Materials
  Prof. Alain C. Diebold, SUNY Polytechnic Institute
  (It's replaced by video recording)
   
14:10-14:50 In-line Metrology and Defectivity for 3D-SOC Hybrid Bonding and TSV Middle Formation
  Maarten Liebens, imec (invited)
   
14:50-15:20 Process Coverage Challenges and Opportunities in Optical CD (OCD) Metrology
  Yudong Hao, Nanometrics
   
15:20-15:40 Break
   
15:40-16:10 Litho CD Metrology for Advanced Multi-Patterning Nodes: A New Optical Solution
  Andrei V. Shchegrov, KLA-Tencor
   
16:10-16:40 Automated Workflow for Process Control and Defect Analysis
  Ozan Ugurlu, Thermo Fisher Scientific (Legacy FEI)
   
16:40-17:10 In-line Metrology for 3D Structure of Semiconductor Devices
  Byoung-Ho Lee, SK hynix

 

 

*The agenda will be subject to change without notice. 

*Presentation materials only for agreed by speaker will be distributed via website after the events.

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