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S6. Electropackage System and Interconnect Product

Thursday, February 6 | 1:00 pm - 6:10 pm
#317

Packaging Growth through Technology Diversification 

The electronics markets were significantly expanded from the computing era based on PC and Internet to the mobility era based on smartphone and 4G, are moving fast to data era based on IoT, AR/VR, AI, Edge computing and 5G. For supporting this trend, every semiconductors area’s involvement, Design-Chip-Packaging-Test, is needed. Especially packaging technology’s flexibility and confrontation-ability will play a particularly important role with packaging as an Advanced-FOWLP using 3D IC and 2.5D IC, MEMS/Sensor, SIP, vertical integration package, and mature package’s advancing. It is challengeable. But this session will be helpful for understanding the new advanced packaging technologies.

 

  • Date: Feb 6(Thu), 2020
  • Time: 1:00 pm - 6:10 pm
  • Room: #317, 3F, COEX
  • Language: English (Simultaneous interpretation will NOT be provided)​

 

Committee

 

  • Gu Sung Kim (Kangnam University)
  • Young Bae Park (Andong National University)
  • Min Suk Suh (SK hynix)
  • Luke Son (Applied Materials)
  • Hwadong Oh (Daeduk Electronics)
  • Chris Lee (Hanmi Semiconductor)
  • Kwangjoo Lee (LG Chem)
  • Seh Kwang Lee (Ehwa Diamond)
  • Hanchoon Lee (DB HiTek)
  • Ju-hyuck Chung (Tokyo Electron)
  • Ji Young Chung (Amkor Technology)
  • Soon Jin Cho (Samsung Electro-Mechanics)
  • Hwail Jin (Samsung Electronics)
  • HR Han (ASE)

 

Registration Fee

  SEMI Member Non-Member Student
Early Bird (by Jan 29) 150,000 won 180,000 won 80,000 won
Onsite 180,000 won 200,000 won 100,000 won

Agenda

3D System Integration Technologies: Enabling System Technology Co-Optimization (STCO) (invited)

Kenneth June Rebibis

imec
1:00 pm - 1:40 pm

The Advanced Packaging Solutions of Samsung

Taejoo Hwang

Samsung Electronics
1:40 pm - 2:00 pm

New Packaging Solution for 5G System Integration

TaeKyeong Hwang

Amkor Technology
2:00 pm - 2:30 pm

Break

2:30 pm - 2:50 pm

Co-Design Challenges for Advanced Packaging and 5G Applications (invited)

Prof. Christopher Bailey

University of Greenwich
2:50 pm - 3:30 pm

Unit Process Challenges of High Density Fanout

Grey Roh

Applied Materials
3:30 pm - 3:50 pm

Inspection and Metrology Solutions for Large Packages and Fine Pitch Bumps

Cheolkyu Kim

Onto Innovation
3:50 pm - 4:10 pm

Break

4:10 pm - 4:30 pm

Advanced Packaging Technologies for High Performance Computing: Challenges and Opportunities (invited)

Jaesik Lee

NVIDIA
4:30 pm - 5:10 pm

The Big Data Driven Package Process

Sanghoun Oh

SK hynix
5:10 pm - 5:30 pm

High Performance Package Technology for 5G and AI

Alex Wang

ASE
5:30 pm - 5:50 pm

Manufacturing High Quality Diffractive Optical Elements(DOEs) Using Nanoimprint Lithography

Eleonora Storace

SÜSS MicroTec Lithography GmbH
5:50 pm - 6:10 pm

* The agenda will be subject to change without notice.

* Presentation files agreed by speakers will be provided to attendees. It will be informed how to download the files after the event.

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