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Advanced Process Technologies to Enable Future Devices and Scaling (invited)

1:30 pm - 2:00 pm

This is an overview of new processing technologies required for continued scaling of leading-edge and emerging semiconductor devices.  The main drivers and trends affecting future semiconductor device scaling are introduced to explain how these factors are influencing and driving process technology development.  Topics explored in this presentation include atomic layer deposition (ALD), atomic layer etching (ALE), selective deposition and etching.  In order to enable self-aligned and multiple patterning schemes as well as emerging devices for future manufacturing, atomic level process technologies need to be leveraged holistically.  Real-world examples of current and future integration schemes, as well as emerging devices, will be presented and explained so that attendees can understand how advanced process technologies will be used in future device manufacturing as well as what benefits and tradeoffs may be encountered in their use.



Robert D. Clark

Sr. Member of the Technical Staff, Tokyo Electron

Robert D. Clark, Ph.D. joined Tokyo Electron (TEL) as a Sr. Process Engineer in 2006 at TEL Technology Center, America, LLC (TTCA) in Albany, NY. In 2010 he relocated to Silicon Valley and was elected Member of the Technical Staff, and in 2015 he was elected as Sr. Member of the Technical Staff. His research focuses on thin film process technologies for advanced and emerging devices, materials, and interconnect structures for use in semiconductor manufacturing. Dr. Clark has contributed to processes for advanced CMOS contacts and high k and metal gate structures used currently in advanced semiconductor device manufacturing.

Prior to joining Tokyo Electron, Dr. Clark was a Principal Research Chemist for Air Products and Chemicals, Inc. (APCI) at the Schumacher site in Carlsbad, CA. During his 6 years at APCI, Dr. Clark was the lead technologist for the development of high k and metal gate precursors where he helped to develop the first precursor used for ALD high k dielectrics in CMOS manufacturing.
Dr. Clark completed his Ph.D. in Chemistry at the University of California, Irvine in 2000 and B.S. and M.S. degrees in Chemistry at Virginia Polytechnic Institute and State University (Virginia Tech), Blacksburg, VA, USA in 1993 and 1995 respectively.

Dr. Clark has served previously as the science advisory committee chair for SRC device sciences, and has received the SRC Mahboob Khan outstanding industrial liaison award. He currently contributes to IRDS through the wafer and environmental contamination control committee, and is a member of multiple conference committees including the AVS ALD, AVS ASD, and VLSI-TSA conference committees. At TEL he has been a U.S. employee of the year, and has recently received the most impactful patent award for the U.S. as well. He currently holds more than 45 issued U.S. patents and has authored or co-authored more than 100 journal and conference publications including numerous invited talks and articles.