Achieve the Balance of Test Cost, Coverage and Complexity of Advanced Packages and HBM
The recent breakthrough of 2.5D and 3D wafer level packaging technologies has opened up many new possibilities and challenges from test perspectives. A faster test speed with higher signal performance is needed along with an advance probe card technology that can provide the required signal quality and the ability to successfully probe on TSV micro-bump structure in an ultra-low pitch grid array. High-Bandwidth-Memory and heterogeneously integrated packages continues to evolve and demand more stringent testing requirement in terms of test coverage & speed as well as probing accuracy. This drives up the cost of test and a balance between test coverage versus test cost has become a challenge.