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Tester Architecture for Era of AI and Big Data

오후 1:00 - 오후 1:30

The broad application of Machine Learning and AI techniques to the real world problems of speech recognition, image recognition, industrial automation and autonomous navigation has accelerated the demand for more computing horsepower and introduced novel architectures. In turn, this demand has pushed the semiconductor industry to deliver new new process technology even faster than historical Moore's Law trends. These devices, in both cloud and mobile applications are placing new demands on automated test equipment. ATE must be rethought to align to the emerging requirements for devices that will exceed 100B transistors within a few years. This presentation will discuss these trends and changes needed in tester architecture so test does not become a roadblock to deploying the most advanced semiconductor technologies for AI applications.

Speaker

GREGORY SMITH

Gregory Smith

President, Semiconductor Test Division, Teradyne

GREG SMITH is the President of the Semiconductor Test Division at Teradyne.

Mr. Smith joined Teradyne in 2006 as a semiconductor test product manager. He has served in a variety of roles at Teradyne including Manager of the Complex SOC Business Unit, and Vice President of SOC Marketing in the Semiconductor Test Division.

Mr. Smith has over 30 years of engineering, management and marketing experience in semiconductor test.

Mr. Smith earned a Bachelor’s degree in Electrical Engineering from the University of Pennsylvania.