Ji Hoon Cha

Ji Hoon Cha has been a wet engineer at Samsung Electronics since 2004. Cha had involved in Flash and Dram memory R&D as a senior wet engineer for 5 years. From 2009, Cha has started logic device R&D and has experienced from sub 32nm to sub 1.4nm logic device. Cha also received “DS division’s Best Talent Awards” for his contribution to development of GAA lateral patterning process in 2023. 
Prior to joining Samsung Electronics, Cha was a senior engineer for Lotte Chemical. During his 5 years at Lotte chemical, Cha had researched polymer catalyst and surfactant from lab scale to pilot and mass products.
Cha received a master’s degree in catalyst from POSTECH, Pohang, Gyeongbuk, Korea. Cha has been in “Marquis Who’s who in the world” since 2010.