Hyoung-Sub Kim

Education

2008, Ph.D. University of Texas, Austin, TX (Electrical Engineering)

1990, M.S. Arizona State University, Tempe, AZ (Electronic Engineering)

1988, B.S. Kyungpook National University, Korea (Electronic Engineering)

Career

2020, Semiconductor R&D Center, Head of Research

2020, Semiconductor R&D Center, Head of Memory Technology Development

2015, Memory Business, Head of DRAM Process Architecture Team

          * Mass produce first 2nd and 3rd generation 10nm-class DRAM

2012, Semiconductor R&D Center, DRAM Technology Development Team

          * Develop 1st generation 10nm-class DRAM

2011, Memory Business, Head of Product Quality Assurance

2009, Memory Business, DRAM Process Architecture Team

2002, Memory Business, Advanced Technology Development Team

1994, Semiconductor R&D Center, Technology Development Team

1991, Memory Business, Memory Technology Team