Byeong Chan Lee

BYEONG CHAN LEE, Ph.D. has been Technical Senior Director position at Applied Materials company for 5 years with responsibility of new integrated module design for high performance next generation device development. Developed DRAM new bit-line metal and patterning module with improved performance and provided developed module process to customer. Lead logic contact project for performance improvement and established new integrated system for contact interface engineering. Validated device performance benefit for both device of internal and customer through the collaboration with industry key logic customers. For the development of the next generation of high-performance logic device, I’m working on core IMS pipe-line module projects, i.e., Novel GAA IO formation, Advanced GAA Source/Drain, GAA strain / Junction development and next generation contact interface engineering, in collaboration with customers along with internal development.
Prior to joining APPLIED MATERIALS, LEE was project leader of 7nm logic process module team in process development team since 2016 and of source/drain module of 20nm/14nm/7nm logic device in Samsung semiconductor R&D center since 2010. Before LEE lead process module team, he has been worked in the unit process development team for 10 years at Samsung Electronics, R & D Center, 1) leader of epitaxial growth process & Source/Drain module development team, 2) FEOL unit process development for DRAM, i.e., ion implantation, Ultra-shallow junction formation, low resistivity new gate & bit-line metal process and epitaxial Si / SiGe growth process. 

LEE received B.S. degree in Materials Science & Engineering, 1990, Hanyang University (Seoul, South Korea) & M.S. & Ph D degree in Materials Science and Engineering, 1992-1997, KAIST(Korea Advanced Institute of Science and Technology), Daejeon, South Korea. Successfully demonstrated the strengthening mechanism of Al-Li alloy at the first time and proposed new strengthening mechanism in high rank SCI journal.