Anabela Veloso

Anabela Veloso received a 5-years college degree (M.Sc.) in applied physics engineering from IST-Technical University of Lisbon, Portugal in 1996. Until 2001, she worked for her Ph.D. studies on advanced magnetic read heads (Ph.D. degree obtained in 2002 from INESC-IST-Lisbon University, Portugal, including an internship at Storage Technology Corporation, Louisville, Colorado, USA in 2000). Since 2001, she has been working at Imec, in Leuven, Belgium, where she is a principal member of technical staff. Currently, her main research interests are in the areas of advanced CMOS device physics, integration, characterization, and technology, with recent focus on the exploration of scaled nanowires
/nanosheets based FETs (with lateral or vertical transport) and logic with functional backside, buried power rails and nTSVs. She has authored or co-authored more than 200 papers published in peer-reviewed international conference proceedings and technical journals, presented 17 invited conference talks, and has been (co-)inventor of more than 23 filed/granted patents. She has also been serving in several conference committees including IEDM, SSDM, and the Symposium on VLSI Technology and Circuits.