Sanghoon Ahn

Sang Hoon Ahn, Ph.D. has been in advanced process development positions at the Semiconductor R&D Center at Samsung Electronics for 19 years with his responsibility in developing high performance dielectrics, and pattern-assisting films, and pathfinding new technologies such as area selective deposition (ASD), airgap and deposited EUV PR. He contributed to the development of multi-generations of low k dielectric solutions for logic interconnect and expanded them to DRAM for the first time in the world. As a pathfinder, he has led ASD development efforts by demonstrating area selective deposition of dielectric on dielectric for FAV (fully aligned via) applications. Ahn received a Ph.D. degree in the field of materials science and engineering from the Massachusetts Institute of Technology, Cambridge, MA, USA and a B.S degree in the same field from the University of California, Berkeley, CA, USA. His primary interest in microelectronics and micro-photonics led to successful unveiling of mechanisms in dielectric constant reduction in SiO2, and light emission efficiency loss in Si solar cells and Er-doped Si. He has served as a committee for the Korean Conference on Semiconduct0ors for more than 10 years as well as for IITC (International Interconnect Technology Conference) from 2019 to 2023. He has joined the scientific committee for ASD Workshop since 2023. He has published more than 70 patents and conference papers.